(PRWEB) March 29, 2012
In a step toward computers that mimic the parallel processing of complex biological brains, researchers from HRL Laboratories, LLC, and the University of Michigan have built a type of artificial synapse.
They have demonstrated the first functioning memristor array stacked on a conventional complementary metal-oxide semiconductor (CMOS) circuit. Memristors combine the functions of memory and logic like the synapses of biological brains.
The results of their research are published online and appear in Nano Letters.
The work is part of the Defense Advanced Research Projects Agencys (DARPA) SyNAPSE Program, or Systems of Neuromorphic Adaptive Plastic Scalable Electronics. Since 2008, the HRL-led SyNAPSE team has been developing a new paradigm for neuromorphic computing modeled after biology.
In a conventional computer, logic and memory functions are located in different parts of the circuit and each computing unit is only connected to a handful of neighboring units. While conventional digital computing has the speed and complexity to emulate lower hierarchy animal intelligence, it is still far from matching the efficiency, density and associated energy dissipation of complex biological brains.
In contrast, a brain has neurons connected to each other by synapses, which act as reconfigurable switches that can form pathways linking thousands of neurons. This enables a brain to perform many operations simultaneously, or in parallel. A human, for example, can recognize a face in an instant exceeding the speed of even a supercomputer.
The researchers developed a vertically integrated hybrid electronic circuit by combining the novel memristor developed at the University of Michigan with wafer scale heterogeneous process integration methodology and CMOS read/write circuitry developed at HRL. This hybrid circuit is a critical advance in developing intelligent machines, said HRL SyNAPSE program manager and principal investigator Narayan Srinivasa. We have created a multi-bit fully addressable memory storage capability with a density of up to 30 Gbits/cm
