Debugger with Graphical Peripheral Control Introduced for Fujitsu 16LX Series Flash Microcontrollers
(PRWEB) July 19, 2002
Fujitsu Microelectronics has announced that Accemic GmbH & Co. KG of Munich, Germany has developed an embedded debugger for the Fujitsu 16LX range of Flash microcontrollers.
Modern microcontrollers, such as the Fujitsu 16LX family, are characterised by the increasing number and complexity of on-chip peripherals. Many debuggers offer developers no assistance with this type of peripheral, resulting in time-consuming searches through increasingly thick manuals for the appropriate register address and the meaning of the individual control bits. These difficulties are compounded by the arithmetic calculations required in the conversion from hex to bin and vice versa.
The Accemic MDE (MDE = Monitor Debugging Environment) makes it possible to debug single chip Flash or ROM applications without the need of external RAM or evaluation chips. It is a source-level and symbolic debugger for embedded C applications. It offers facilities which have always been required by microcontroller developers but which were often not available on the market.
Developers spend 20%-50% of their time debugging applications, a considerable part of which is spent searching the manual. The Accemic MDE integrates a processor status window, designed to save time and effort during these debugging tasks. During the running-in process and trouble diagnosis, it is possible to determine at a glance the status of the on-chip peripheral, the interrupts and the I/O pins. By clicking on a peripheral element, the name, address and content of the relevant control register are clearly displayed. In addition, the meaning of the individual control bits that can be edited in the plain text is also displayed. With a capacity of approximately 3600 bits, which is typically required to control the peripherals of the Fujitsu MB90F594, for example, the processor status window is an invaluable tool.
Coloured borders around the peripheral units give an overview of the current interrupt status of the individual peripheral elements. A blue border signals the existence of an interrupt request but if the border turns red, the interrupt enable bit for the request is set.
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