Summary of Fujitsu Microelectronics Europes single-CAN 32-bit microcontroller suits a host of automotive applications
Fujitsu Microelectronics Europe introduces the MB91F364G, a 32-bit single CAN interface microcontroller designed for automotive and industrial applications. Fabricated in 0.35µm technology, it features an FR-core with embedded flash ROM, various peripherals like UARTs and ADCs, and a background debug support unit for efficient software development without external emulators.
Parts used in the MB91F364G Project:
- FR-core (5-stage pipelined RISC core)
- 16 general-purpose registers
- Internal Harvard structure
- 16kB data RAM
- Bit search unit
- 256kB embedded flash ROM
- UARTs
- I2C interfaces
- Serial synchronous interfaces
- CAN interface
- 16-bit reload timers
- Input-capture/output-compare units
- Real time clock
- 12-channel ADC
- 8 external interrupts
- Background debug support unit
(PRWEB) October 27, 2001
London, October 25 2001 Fujitsu Microelectronics Europes growing family of well-proven, 32-bit CAN-microcontrollers, designed within the companys European Microcontroller Design Centre (EMDC), encompass devices providing both high and mid-end automotive solutions targeted at applications including dashboard, body-electronics and information display.
Via its new MB91F364G, Fujitsu now offers a 32-bit single CAN interface device, for applications demanding a small footprint. This new device satisfies todays requirement for higher performance coupled with platform-based solutions, where many compatible devices are used for a wide variety of applications.
The MB91F364G is fabricated in 0.35µm geometry embedded flash technology and built around the established Fujitsu FR-core, a 5-stage pipelined RISC core with 16 general-purpose registers and internal Harvard structure. The core is supported by 16kB data RAM and a bit search unit. Program code and constant data are located within a 256kB embedded flash ROM, which can be programmed in-circuit using a serial link or via parallel programmers. The ROM offers a minimum 10,000 write/erase cycles.
The device has a host of on-chip peripherals including UARTs, I2C and serial synchronous interfaces, in addition to the CAN interface, 16-bit reload timers, input-capture/output-compare units and real time clock, as well as a 12-channel ADC and 8 external interrupts. This wealth of peripherals enables the MB91F364G to be used in a wide range of applications from automotive to industrial. The device shares many of the software modules and operating systems with the established MB91360 series microcontrollers, for which libraries already exist, making software development extremely efficient.
Particularly important for single-chip applications is the new on-chip background debug support unit, which helps software development and debugging of the final application without the use of in-circuit emulator systems.
This unit provides a number of instruction and data-breakpoints including mask and range-functionality.
- What is the primary application target for the MB91F364G?
The device targets high and mid-end automotive solutions including dashboard, body-electronics, and information display. - How is the MB91F364G fabricated?
It is fabricated in 0.35µm geometry using embedded flash technology. - Can the program code be programmed in-circuit?
Yes, the ROM can be programmed in-circuit using a serial link or via parallel programmers. - Does the MB91F364G share software modules with other series?
Yes, it shares many software modules and operating systems with the established MB91360 series microcontrollers. - What is the function of the background debug support unit?
It helps software development and debugging of the final application without the use of in-circuit emulator systems. - Does the device include a real time clock?
Yes, the device includes a real time clock among its on-chip peripherals. - How many write/erase cycles does the ROM offer?
The ROM offers a minimum of 10,000 write/erase cycles. - What type of core architecture does the device use?
The device is built around the established Fujitsu FR-core, which is a 5-stage pipelined RISC core.
