OnChip Establishes New Capability to Provide Hi-Rel Visual Inspection Services for Wafers or Bare Die Semiconductors
Santa Clara, CA (PRWEB) January 22, 2012
OnChip has established new capability to offer 100% visual inspection using both low and high power microscopes that meet Commercial, Military and Medical Electronics specifications. Inspection is done to look for various types of visual defects.
Some of the more common defects include:
Embedded foreign material
Metallization or Passivation voids & irregularities
Contamination such as liquid or adhesive residues and surface particles
Surface scratches caused by test probes or wafer handlers
Dicing defects such as chip outs and cracks
Semiconductor ICs (Integrated Circuits) are extremely fragile and endure a variety of stresses during wafer fabrication, testing and dicing. They are easily prone to defects that would either prevent the device from operating correctly or pose a reliability concern for long-term operation. These defects are caused either during wafer fabrication or mechanically-induced during handling. The extent to which any defect may be acceptable would be defined by the appropriate criteria selected to fit the application environment. Units that are defective can be effectively removed by visually inspecting the devices under high magnification. There are many different inspection criteria, but the most common one is MIL-STD-883, Method 2010. This inspection standard defines the equipment to be used for the inspection, magnification ranges, what defects to look for and quantifies the amount of any particular defect that is acceptable.
The ability to visually inspect a circuit requires a lot of skill and training, which increases through experience and a continuous training program. OnChip employs a highly qualified staff of inspectors who have over 30 years of experience in this field. The company works very closely with customers during the initial phase to ensure proper calibration to the inspection needs. Visual inspection services are offered either in wafer-form or after the device has been sawn and placed in chip trays such as waffle packs or gelpaks.
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