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Adaptive 60 Hz Noise Cancellation Using Atmega32




An active noise canceler to eliminate the 60 Hz noise found in electrical signals due to AC power-line contamination.

60 Hz noise is frustrating for anyone trying to make sensitive measurements of low voltage processes (eg. Electrocardiogram measurements), record audio from electrical instruments (eg. guitar “hum”), or use electronic systems near an AC transformer. The most common way to eliminate the noise is through a 60 Hz notch filter. Because there are inherent variations in the 60 Hz signal, a notch filter is not robust against signal source frequency changes. However, using a microcontroller such as the ATMega32 to monitor a reference signal and output an out-of-phase signal to cancel the noise, we overcome the limitations of a single-frequency selective notch filter and can achieve at least 15 dB cancellation of 60 Hz component in the contaminated signal. Digital Signal Processors (DSPs) or Field Programmable Gate Arrays (FPGAs) can be programmed for this purpose, but are substantially more expensive than the ATMega32.

This project was undertaken during a five-week design lab for ECE 476 with Professor Bruce Land (TA: Adrian Wong) at Cornell University.

Robert Ochshorn (rmo25)
Kyle Wesson (kdw24)

Design

Rationale and Source of Project Idea

The original goal of our project was to adaptively cancel sound noise in a rapidly changing environment such as the interior of a vehicle. We were able to find numerous reference papers that had accomplished similar goals. While we have not given up hope that we can cancel audible noise, several factors (eg. poorly functioning microphones, processor speed) have prevented us from achieving this specific goal to date. However, adaptively cancelling audio is a very similar problem to canceling electrical noise.

Early in the semester, our Professor, Bruce Land, suggested making an adaptive noise canceler to help neurobiology researchers who need to make sensitive, noiseless measurements. He had completed some preliminary simulations of adaptive cancellation in Matlab and created a block diagram of a potential solution. We decided to work on this since it would be an excellent first step to the ultimate goal of (sound) noise cancellation.

Background Math

From the start, we settled on a least mean squares (LMS) adaptive filter design. A LMS filtering approach is well known and well documented (see references). The goal is to continually update a set of weights that change the output of the system. This output (also known as the error signal) is fed back into the filter which modifies its weights according to the ultimate desired signal.

The best description of the LMS filtering algorithm was found in Active Noise Control Systems: Algorithms and DSP Implementations (Sen M. Kuo and Dennis R. Morgan, Wile & Sons, 1996) which we excerpt here:

  1. Choose parameters and initial conditions: l, , and w[0], where l is the order of the filter, is the step size, and w[0] is the initial weight vector at time n = 0.
  2. Compute adaptive filter output:
  3. Compute the error signal: e[n] = d[n] – y[n].
  4. Update adaptive weight vector from w[n] to w[n+1] using the LMS algorithm:

The math to determine our filter characteristics is documented in the implementation section. In order to eliminate any possible aliasing, we need to sample at a rate consistent with the Nyquist theorem. Since we decided to cancel below about 230 Hz signals, our input sampling frequency needs to be at least 460 Hz, and we need to lowpass the contaminated signal.

Logical Structure

In one sentence: our project takes in a contaminated signal, a reference signal, and outputs a “anti-noise” signal that is summed with the contaminated signal to produce a clean “final” signal.

Control Flow

Our software is structured into three primary components:

  1. an output interrupt on timer0 that writes to PWM at full clock speed with an interrupt on counter overflow:
  2. an input interrupt on timer2 that muxes analog in between the reference and error source, performs the a/d conversion, and sets program state to flag a new value as ready; this runs with a clk/64 prescaler:
  3. finally, the main loop polls state set in the input interrupt and either updates filter weights based on a new error signal, or computes output based on a new input.

Hardware and Software Tradeoffs

We needed to make both hardware and software tradeoffs in our design. Since the ATmega32 only runs at 16 MHz, we needed to be realistic about the frequency range we could cancel. The larger frequencies will require more clock cycles to get the input reference signal. In addition, larger filter lengths require more multiply and accumulate (MAC) operations. Thus, we have a tradeoff between the quality of our adaptive filter and the amount of time we have to process and generate the anti-signal. We decided that it was reasonable given the constraints of the system to adaptively cancel frequencies below 230 Hz.

Adaptive 60 Hz Noise Cancellation Using Atmega32

We also made some hardware tradeoffs. We originally intended to use a four-pole lowpass Butterworth filter with cutoff frequency of 250 Hz to filter the pulse width modulated output from the ATmega32 into the output waveform. However, we learned that the Butterworth filter, while having the flattest frequency response, has an inherent phase delay. Because our filter needs to output the correct signal within a small tolerance relative to the reference signal, using the higher-quality filter was not practical. Instead, we used a simple RC filter with a cutoff frequency of about 200 Hz (the RC filter doesn’t have a steep cutoff).

A persistent source of frustration was the ATmega32’s A/D converter input voltage range. Because we choose to use a 2.56 internal reference voltage, our range was limited to 0 – 2.56 V. While the range is reasonable (since the input and output signals could be 1 V peak-to-peak), the range forces us to DC bias the input signal to roughly 1.25 V for a full “range” in the ADC. Since none of the signals we used were biased to 1.25 V, we needed to constantly consider the peak-to-peak and mean voltage of our input signals and rebias them accordingly. If the ATmega32’s ADC could have dealt with a plus/minus voltage or if we used an external ADC that automatically rebiased the range, we might have had an easier time dealing with a various assortment of input signals (ie. mics, guitars).

Standards, Patents, Copyrights

There is one standard that is the reason for our project: 60 Hz power line transmission. Because the U.S. power grid transmits power at 60 Hz, this frequency is public (noise source) enemy number one. Thankfully, we are also able to take advantage of this to cancel the noise using an AC transformer to obtain a reference signal.

There are also standards we are using inherently that we have not paid much attention to such as the standard we are using to “program” the ATmega32, the USB to serial connection from the computer to the STK500 board, the standardization of batteries (9V), and the standard operational amplifier “golden rules.”

Certainly cancelling 60 Hz noise is not a new topic and there are certainly patented removal techniques, patents on notch filters, and studies of noise cancellation. However, we are unaware of any adaptive noise cancelers that use a low-cost microcontroller such as the ATmega32. One device we came across is the Hum Bug Noise Eliminator. However, we were unable to find out any more information regarding the product such as price, speed, power supply, etc.

Implementation

The final hardware selection ended up being a small subsection of all the hardware we built. The additional hardware section has links to all circuit schematics we made and gives reasons we did not use them.

The hardware we did use is detailed here. It included two operational amplifier adder stages (to generate the noise and clean signal), an AC transformer stage (to get a reference signal), and a simple RC filter (to convert the pulse width modulated signal to a sinusoidal signal).

Final Hardware Implementation

60 Noise Cancellation System: Block Diagram

This is the overall noise cancellation technique we use. Here we show the entire system in a reduced “block diagram” format. Input/output pins are shown on the ATmega32.

Noise Adder (60 Hz Adaptive Noise Cancellation)

This circuit is used to create a 60 Hz contaminated signal for adaptive filter cancellation. Since we need to be able to test our adaptive algorithm with a well-known and understood signal, we used this non-inverting adding circuit so that we can sum a 60 Hz “noise” signal and a valid reference signal. We use one function generator to make a “clean” signal and sum it with the output of the transformer circuit.

Noise Remover (60 Hz Adaptive Noise Cancellation)

This circuit takes in the noise contaminated signal and an adaptive output signal from the ATmega32 and sums them to remove the contamination. The overall output is then fed back to the ATmega32 as an error reference signal through a RC lowpass to prevent aliasing.

Parts List:

Budget

Prototype Board

QUANTITYITEMUNIT COSTTOTAL COSTNOTES
$13.80
1ATMega32$8$8
1ECE 476 Prototype Board$5$5
6Header Socket Pins$0.05$0.30
1DIP Socket$0.50$0.50Mega32 sits in this

Lowpass Filter

QUANTITYITEMUNIT COSTTOTAL COSTNOTES
1$3.63$3.63
29V Battery$0.47$0.94purchased from WalMart; receipt available
1Solder Board$2.50$2.50cut in half to make one circuit
4Header Pins$0.05$0.20easy to grab
1LM 358freefreefree in lab

Adder Circuit

QUANTITYITEMUNIT COSTTOTAL COSTNOTES
1$3.94$3.94
29V Battery$0.47$0.94purchased from WalMart; receipt available
1Solder Board$2.50$2.50cut in half to make one circuit
10Header Pins$0.05$0.50easy to grab
2LM 358freefreefree in lab

Additional Items

QUANTITYITEMUNIT COSTTOTAL COSTNOTES
$11.00
1AC transformerfreefreefree from Bruce
1Protoboard$6.00$6.00used for demo but not needed in final design
1Power supply$5.00$5.00used for demo but not needed in final design

Total: $32.17 (as shown in demo, actually cheaper if made on PCB)

For more detail: Adaptive 60 Hz Noise Cancellation Using Atmega32

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