EE476 Final Project Real-time Debugger By Emre Tezel & Cagdas Ozgenc
Objective: To design a debugger that is capable of tracing AT90S1200 user programs while the micro-controller is attached to external peripherals. The debugger will be able to display I/O activities, and dump the values of the registers.
Parts Required: Atmel STK-200 starter kit (kit includes a single AT90S8515 micro-controller), Inter x86 compatible PC (required for debugger software), serial cable (required for UART communication), 32k 24 pin 70ns SRAM (HY62256A), latch (CD74HC573E).
Features: Currently Atmel AT90S1200 micro-controllers do not have any tracing functionality, therefore there is no procedure to gather information about the MCU state although it is possible to suspend the program execution by putting the MCU into idle, or sleep mode.
For this reason, the only way to control the program execution is to implement a Virtual Machine inside the MCU, that is, there has to be a program responsible for execution of other programs. This program will be listening to external commands and suspend the program execution and report about the MCU state when necessary.
PC software and the Virtual Machine will be communicating through the UART, and Virtual Machine suspends, resumes execution, and dumps registers, program counter, stack and I/O register values according to the commands sent from the PC software.
The user programs are loaded to external RAM instead of being programmed into FLASH. Accordingly, a loader is implemented. Atmel assembler generates an object file that contains the opcodes. This file is read from any PC secondary storage, such as a hard-drive or a floppy, and opcodes are extracted and transferred through serial connection to the SRAM of the MCU.
The available RAM size on the AT90S8518 is 512 bytes. This is not enough for emulating an AT90S1200 since AT90S1200 has 1K of FLASH, 32 bytes of register space, 15 I/O lines, and an additional 64 bytes of EEPROM. Therefore, it is required to use the external RAM addressing capability of AT90S8515. However, according to the limitations of Atmels design, the I/O ports A and C of AT90S8515 are not able to be used for emulating AT90S1200 I/O functionality, since these ports are used for external memory access. Fortunately, in AT90S1200 ports A and C are not implemented. In contrast, pins 6, and 7 of I/O port D are also used to access external SRAM and are forfeited. Moreover pins 0, and 1 of the same port are allocated to UART communication. Unfortunately, it is not possible to emulate these missing I/O pins through any other pin of the AT90S8515 since they all serve a specific purpose.
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