Jennic Launches JN513x Family Second Generation Wireless Microcontrollers

Sheffield, UK and CES, Las Vegas, NV (PRWEB) January 8, 2007

Jennic has announced the commercial launch of its second generation wireless microcontrollers, the JN513x family, which realize a sub $ 3 price target in 100k+ units. In addition to achieving this new price threshold the devices provide performance, price and power improvements over the current JN5121 family. Coupled with the release of the wireless microcontroller family is a range of modules, evaluation kits, software and protocol stacks.

 

The new product family is introduced as part of Jennic’s ongoing wireless microcontroller strategy. Jim Lindop, CEO of Jennic, commented, “With our first generation products in volume production, Jennic is now demonstrating its ability to execute against an aggressive roadmap which yields continual improvements to radio, power consumption and processor performance. In addition, we are meeting the low price requirements for mass market acceptance of wireless microcontrollers.”

 

The JN513x family second generation wireless microcontrollers realizes a number of improvements over the existing solution:

 

Extended range is achieved with a new modem architecture that provides 97dB receive sensitivity, and is more robust in noisier environments with greater tolerance to carrier offset and EVM. Transmit power is also improved to +3dbm. The JN513x family is the only single-chip wireless microcontroller with a 100dB link budget and specified over the full industrial temperature range and wide supply voltage.

Deep sleep current consumption is 400nA, allowing products waiting for a user-event to consume virtually no power. For an active part of a wireless sensor network, with on-chip oscillator and protocol timers running, sleep current consumption is under 2μA. These sleep power consumption figures, in conjunction with the tight coupling of radio, protocol hardware and software on a single-chip wireless microcontroller, set a new industry benchmark for wireless sensor applications requiring extremely long battery life.

The memory available has been increased to 192k ROM and 96k RAM allowing full exploitation of the on-chip 32-bit RISC processor for complex applications and algorithms coupled with ZigBee or other mesh protocol stacks. Variants are available with 32k, 16k or 8kB RAM for simpler, low cost applications.

The on-chip ROM includes the world’s first IEEE802.15.4 version B media access protocol layer, provision for a range of external serial EEPROM devices, over-the-air download, hardware abstraction layers and a simple serial interface. Embedding these features in ROM free up memory space for applications and allow simple dongle products at low cost. IEEE802.15.4B and ZigBee variants of the JN513x family are available.

Each device shipped has a unique MAC address identifier allowing the saving of external FLASH devices. A further 256 bits of one-time-programmable memory is available for customers to programme on-chip AES security keys and other unique identifiers.

Package and pin-out of the JN513x remains the same as the first generation JN5121, allowing upgrade of current designs to second generation with no board changes.

A family of modules provide ceramic antenna, SMA and UFL connector options. Standard power and high power modules are also available offering link budgets of 100dB and 119dB respectively. The standard module has demonstrated operation over 1km and the high-power module over 4km in open-space environments. Modules meet FCC, ETSI and TELEC regulations, reducing the effort needed to integrate Jennic devices into end products.

 

A new generation of evaluation kits are available. These provide a controller and four sensor units with a range of plug-in modules, offering power and antenna options. Users will now be able to evaluate different module types to suit their application and environment, with a range of site survey tools, including a customizable packet error rate measurement routine.

 

Development tools and support

 

Developers can lower their tool investments and learning curves using a new release of Jennic’s free, Integrated Developer Environment. This includes a new C compiler offering a 10 percent code density improvement.

 

Jennic’s full range of application notes, reference designs and protocol stacks will be fully functional with this second-generation product family and are publicly available at Jennic’s support web site.

 

Pricing and availability

 

JN513x products are now available for general sampling in a 56-pin QFN RoHS-compliant package. The JN513x product family includes the JN5139 wireless microcontroller with 192k ROM, 96k RAM at $ 3.50 in 100k quantities down to the JN5131 with 192k ROM, 8k RAM at $ 2.95 in 100k quantities. For additional information, contact any Jennic sales representative or authorized worldwide distributor.

 

About Jennic

 

Jennic is a fabless semiconductor company leading the wireless connectivity revolution by providing wireless microcontrollers for a broad range of applications. Its expertise in systems and software combined with world class RF and digital chip design provides low cost, highly integrated wireless microcontrollers with a focus on the IEEE802.15.4 and ZigBee standards. The company’s products include state-of-the-art low power wireless microcontrollers, modules, development platforms, protocol and application software. Headquartered in Sheffield, UK, Jennic also has offices in China, Japan, Korea, Taiwan, East and West Coast USA.

 

Contact:

 

Fiona Davis, Jennic

 

Tel: +44 (0) 114 281 2655

 

Fax: +44 (0) 114 281 2951

 

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About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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