Nordic Semiconductor has announced the nRF52805, which is a microcontroller from the NRF52 series of microcontrollers. Measuring at just 2.48 x 2.46mm, the nRF52805 is the smallest of all the nRF52 series.
Despite its small size, the nRF52805 System-on-Chip (SoC) top up the industry-leading Nrf52 Series with an SoC in a WLCSP enhanced for small two layer PCB designs, ideal for cost-constrained utility. The nRF52805 is the perfect alternative for applications such as beacons, disposable medical devices, sensors, styluses and presenters.
The nRF52805 features an Arm® Cortex® – M4 processor, clocked at 64 MHz, equipped with a 192 KB Flash and 24KB RAM, and incorporates wide variety of analog and digital interfaces such as a 2-channel 12 bit ADC, SPI, UART and TWI. The Nrf52805 which is a Bluetooth 5.2 SoC enables Bluetooth Low Energy and 2.4 GHz proprietary protocols. It enables Bluetooth high-throughput of 2 Mbps, transmitting info faster and even more efficient, and Bluetooth channel selection algorithm #2(CSA#2), improving coexistence ad reducing interference. The radio has up to 4 decibel-milliwatts TX power and -97 dBm sensitivity (1 Mbps Bluetooth LE).
- 64 MHz Arm Cortex-M4
- 192 KB Flas + 24 KB RAM
- Bluetooth Low Energy
- Bluetooth 5.2
- High-throughput 2 Mbps
- Channel selection algothrithm #2
- 2.4 GHz proprietary protocol support support
- Ultra-low-power 2.4 GHz multiprotocol radio
- +4 dBm TX power
- -97 dBm RX sensitivity
- 7 mAin TX (4 dBm)
- 4.6 mA in TX ( 0 dBm)
- 4.6 Ma in RX (1 Mbps)
- Integrated balun with single-ended output
- SPI, TW, UART
- 2-channel 12-bit ADC
- Integradted DC/DC regulator
- 0.3 µA in System OFF
- 1.1 µA in system ON with 24 KB RAM retained and RTC running
- Optimized for small two-layer PCB designs
- 2.48 x 2.46 mm WLSCP package
- Significantly lower cost than four-layer PCB designs
- Only 10 external passive components
- 9.5×8.8 mm reference layout design is accessible giving access to all 10 GPIOs
About the Nrf52805 size, Nordic Semiconductor says:
The nRF52805 is available in our smallest package, a 2.48×2.46 mm WLCSP, optimized for two-layer PCB designs. This supports designs that are small and very cheap, qualities that are originally a design trade-off, since those small designs originally require four layer PCBs, which have significantly higher cost. We provide a 9.5×8.8 mm reference layout design with all ten GPIOs available, requiring only 10 external passive components (inc. two crystal load capacitors).