Precision programmable current source uses two ICs

The loop: one DAC, one op amp, one pass device

A programmable current source is a current sink with the servo loop closed around a resistor. A 12-bit DAC supplies the set point, an op amp compares it with the voltage across the sense resistor, and the amplifier drives the gate of a pass transistor. The loop adjusts that gate until its inputs match, so the sense voltage equals the DAC output and the load current is that voltage divided by the resistance. Nothing in the equation contains the transistor’s threshold, temperature or load voltage.

  DAC V_set ──► (+)┐
                   │ op amp ──[R_g]── G ── Q1 (N-MOSFET)
  sense node ──► (−)┘                    │ D ── LOAD ── +V_RAIL
                                         │ S
                                         └──[ R_sense ]── GND
                                                │
                                                └──► sense node

The MCP4725 is a convenient set-point DAC: 12-bit, I2C, six pins, reference taken from its own supply.

Choosing the sense resistor and the compliance ceiling

The sense resistor trades resolution against headroom. A larger resistor turns the same current into a larger voltage, easier to resolve and less troubled by op-amp offset; a smaller one leaves more supply for the load. Running the DAC from a 3.3 V rail, 165 Ω gives 20 mA full scale and about 4.9 µA per step. Powering that DAC from a 4.096 V reference instead would give exactly 1 mV per step.

Compliance is Kirchhoff: load voltage is the pass rail minus sense voltage, drain-source drop and wiring loss. On 12 V with a 3.3 V sense level the load sees roughly 8.5 V, and the transistor dissipates the rest — about 0.17 W at 20 mA, fine in a SOT-23 and not in anything smaller.

Gate drive is the trap. A source-referenced N-channel MOSFET needs its gate above the source by the gate-source overdrive, so the amplifier output must reach sense voltage plus roughly 2–3 V. With a 3.3 V sense level that exceeds a 5 V rail; run the amplifier from the pass rail, as the OPA189 allows up to 36 V, or use a high-side P-channel and accept the level shifting.

Where the accuracy actually goes

The instinct is that the op amp decides the accuracy; on a 20 mA range it usually does not. In ppm of full scale:

• Sense resistor: 0.1 % is 1000 ppm, and its temperature coefficient adds hundreds more over a 20 °C swing.
• DAC gain and offset: the MCP4725 is specified at ±2 % of full scale gain error, 0.75 % offset error and ±14.5 LSB maximum integral nonlinearity. A 12-bit DAC is not a 12-bit current source without calibration.
• Op-amp offset: 25 µV maximum across a 3.3 V sense voltage is 7.6 ppm, or 150 nA through 165 Ω.
• Bias current: 1 nA into 165 Ω is 165 nV, which is nothing.

Those last two swap places as the range drops, because bias current is multiplied by the sense resistor: 10 µV at 200 µA with 10 kΩ, but 1 mV at 2 µA with 1 MΩ — 500 ppm of full scale, before leakage. That is where a 1 nA bipolar input stops working and a CMOS or chopper input is needed, with its charge injection filtered rather than ignored. Drift behaves the same way: 0.25 µV/°C is irrelevant across 3.3 V and dominant across 100 mV. The DAC’s reference is VDD, so the current follows the rail proportionally.

Stability: three capacitors, one of them obvious

• Gate capacitance. The amplifier drives tens to hundreds of picofarads, and because a gate draws no DC current, a series resistor of 100 Ω to 1 kΩ costs nothing in accuracy.
• Sense-node filter capacitance. A capacitor across the sense resistor is tempting but sits in the feedback path and moves a pole downward. Keep the loop crossover well below that pole or compensate deliberately.
• Load cable capacitance. This topology gets that one free: the cable hangs on the drain, a high-impedance current source, so it never loads the amplifier.

The textbook fix for a capacitive load is an isolation resistor between output and load, adding a zero that restores phase margin at the cost of a drop equal to output current times resistance. For a gate that error is zero; for a resistive load it is not, and the dual-feedback variant — DC through one resistor, AC through a capacitor — preserves both. A 1 MHz, 0.8 V/µs amplifier such as the OPA2277 also needs microseconds to slew a full-scale gate step, which sets the settling time of a current step.

What it buys over a resistor and a transistor

The two-component version sets current with a resistor from a reference to the base, so emitter current is roughly (V_set − V_BE)/R_E. Base-emitter voltage moves about 2 mV/°C, and through 165 Ω that is roughly 12 µA/°C on a 20 mA output — several hundred ppm per degree, against 25 ppm/°C for a decent resistor. Part-to-part V_BE spread needs a trim per board, and finite output resistance lets current follow load voltage, which the loop suppresses by its gain. The cost is a stability analysis, a rail for the amplifier, and a DAC needing calibration.

Limits worth stating plainly

This is a sink: the load return must sit above ground, ruling out grounded loads. Inductive loads need a freewheel path, or the drain sees an unclamped spike when the loop opens. Above a few tens of milliamps the pass device and sense resistor both dissipate, and 12-bit resolution buys nothing against a 1 % resistor.

Everything above comes from the documents below; resistor values, loop compensation and the error of a built unit have to be measured, especially phase margin, which no datasheet predicts for your layout.

References

• Texas Instruments, OPAx277 High-Precision Operational Amplifiers, datasheet SBOS079C, 2023.
• Microchip Technology, MCP4725 12-Bit DAC with EEPROM Memory in SOT-23-6, datasheet DS22039D.
• Texas Instruments, Do-it-yourself: Three ways to stabilize op amp capacitive loads, SSZT999.
• Texas Instruments, OPAx189 Zero-Drift, Rail-to-Rail Output Operational Amplifiers, datasheet.