The frequency counter is the most popular instrument in the home maid instruments. I think that the reason why it is built widely is: it can be built easily because it is digital circuit, it is generic measurement and many construction kits are available. Many electronics hobbyists will experienced to build any frequency counter.
This project is second trial for me. But building two ordinaly frequency counter is not smart so that some additional functions ware impremented to the frequency counter. The function is not that abundant compared to generic universal counter however it can measure pulse period/width besides frequency, I named this project “Universal Counter”.
The basic theory of Frequency Counter
What is the Frequency?
The Frequency means number of electrical or mechanical vibration cycles per unit time, to explain this might not be needed now… Hz (hertz) is used for a unit of the frequency and is defined as an SI unit, and it means number of cycles per second: e.g. when 100 cycles are counted per a second, it is 100 Hz. Formarly c/s was used for unit of the frequency.
A frequency measurement system which is especially realized in digital counting circuit seems being called “Frequency Counter”.
Direct Counting Method
When count number of cycles of the input signal for one second, the value of frequency can be got in the counter. This can be realized by simple counter circuit so that this was the conventional frequency measureing method. Many counter IC have been released and many frequency counters thak work in this method are being shipped now. This is the simplest method but the measureing resolution is limited at low frequency. To ensure more resolution, the gate time must be expanded: e.g. when measure at resolution of 1 mHz, 1000 seconds is needed to measure one time.
This is one of the frequency measureing methods that was thought out to make up the defect of direct counting method, and it is prevailing now. This method measures the period (T) of the input signal instead of number of cycles, and calcurate its frequency in the formula f = 1 / T with a microprocessor. Its frequency resolution depends on only time resolution independent of the input frequency.
It can measure low frequency with high resolution quickly however any trigger gitter due to noise decrease measureing resolution. To maintain sufficient time resolution, it generally measures the period of several number of cycles. The reciprocal method seems to also be impmemented to cheap frequency counter because of price of microcontrollers falls.
Basic Counter Circuits
Every measureing method needs to control any clock signal. However using an AND gate that shown in the diagram of principle will occure an extra count. The error rate depands on the duty ratio of the clock signal: e.g. simmetrical clock signal occures +0.5 counts average. This cannot be ignored according to circumstance. At high frequency of several MHz, this will not affect measureing accuracy, however input signal of 99.7Hz results 100 or 101 Hz is not good.
This problem can be avoided by using a synchronous counter instead. In this circuit, the rate of an extra count depends on only fractional number of less than 1, the clock duty ratio doesn’t affect to the extra count. However the synchronous counter can occure any abnormal operation due to asynchronous input that is not guaranteed ts and th. To avoid this problem, any care, such as separating counter stages to insurate most synchronous block or synchronizing control signals with clock to avoid that error, should be taken on this point.
An AT90S8515 is used for the controller because it is very easy to use. The control process are conting, displaying and communicating mainly. They are not that complex, any other microcontroller, such as 8051, H8 and 78K, will able to be used instead.
The main counter that is the most impotant block in this universal counter is divided into PLD (U1) and MCU (U2). The PLD part is a 12 bit counter. It can count up to 4096 and its most significant bit is connected to an external interrupt pin of the MCU, the carry outs are counted by MCU. Therefore total counter length can be expanded easy. In this system, a 36 bit counter of 12+24 bit is implemented. The frequency of the carry out from PLD becomes approx 30 kHz at 120 MHz of input signal, this can be counted with interrupt process easy. The operating frequency of the PLD is 84 MHz minimum, but it worked at over 140 MHz.
To read the counter value in the PLD, a reading mode is used. In this mode, the gate signal from the MCU is routed as a counting clock and the counter gate is opend. Then clock the gate signal until a carry out occures, the counter value can be calcurated with: Counter value = 4096 – number of clocks. Any additional circuit to read the counter is not required, however there is a problem that software loop of up to 4096 times (4.5 msec in AVR) is required. When a shift register to read the counter is implemented, it can be read quickly. But there was not ehough left logic cells for the shift register.
An prescaler IC (MB506) is used as a front end of IN-1. The input frequency is divided by 64 and then input to the PLD. The MB506 can accept from 10 MHz to 2.4 GHz of input frequency. Since this block works at very high frequency, special care should be taken on the significant point at UHF circuit band.
The front end of the IN-2 is a high input impedance and wide band amprefire realized with an FET and a transister. Because it handles small analog signals, decoupling from power supply noise is impotant for the stability. When there is a dynamic driven LED display, large or small ripple voltage will reside on to power line so that taking care of the ripple voltage is very impotant.
The input sensivity – frequency responce is shown in the techinical data. This will nice performance considering it is a simple circuit. To ensure stabled triggering operation, an input attenuator for proper input level is needed. But this was ommitted because many lead relays and its mounting space are required. This can be done by using a probe with built-in attenuator. And a termination resister with switch is also needed. But this was also ommitted. This can be done by using a coupler with built-in terminater.
Bypassing IN-2 Amplifire
Basically, the input coupling method of frequency counter is AC coupled. However some problems will appear when measure on digital signals: e.g. very large duty ratio, single pulse.
Most universal counters have a DC coupling mode with adjustable trigger level. This universal counter can select a TTL coupling mode instead of the DC coupling mode. In this mode, the input signal is bypassed pre-amplifire with a lead relay (RY1) and is connected to the PLD directly. This is suitable for most 5V or 3V logics.
IN-2 Polarity Selector
Inverting trigger polarity of an input signal will not effective for frequency measureing operation, however it is an impotant function when measure a pulse period or width. This function is a part of the PLD, no additional component is required.
A communication interface is available to collect measured value and apply any process with a PC. Since this universal counter is a measurment instrument, the communication interface must be islated from its system ground. The interface is an EIA-574 compatible serial port that is isolated with optical isolators.
This universal counter have two basic operating modes. One is frequency counting mode that counts incoming signal, other is interval measureing mode that counts reference clock gated by incoming signal.
In the Frequency Mode, selected input signal is routed as a counter clock. The gate signal is generated with a timer unit in the MCU and applied to the PLD externaly. This can generate variable gate time easy. The operation is a sequencial loop that reset counter, open gate for a reference time and then display counter value as a frequency. The gate lamp is lit during gate is opend, and wait for 30 msec before each measureing operation to blink gate lamp to indicate refresh timing.
In the Time Interval Mode, the reference clock is routed as a counter clock. The gate signal is generated by input signal. The operation is a sequencial loop that reset counter and gating block, wait for end of one gate time by monitoring PLD status (CEN and EOC), read counter value and adjust it with scaling factor and then display it. This mode is also used at reciprocal frequency measureing mode.
Selecting Operation Mode ([Mode] button)
Mode button changes operation mode. The setting of operation mode and IN-2 input mode are saved into EEPROM at 3 seconds after changes occured, it will be restored next start.
- Mode 0 (Frequency [MHz])
This mode selects IN-1 that divided by 64 with a prescaler. The gate time is 640 msec, so that the total scaling is 1/100. The display format is 0000.0000 MHz, it can display up to 10GHz in resolution of 100 Hz (input range is 10MHz to 2.4GHz).
- Mode 1 (Frequency [Hz])
This mode and follos use IN-2 as its input channel that can select coupling mode and triggering polarity. In this mode, frequency is measured in direct counting method in gate time of 1 second. The display format is 00000000 Hz, it can display up to 100 MHz in resolution of 1 Hz.
- Mode 2 (Frequency [Hz])
This mode measures frequency in reciprocal method. The display format is 0000.0000 Hz, it can display up to 10 kHz in resolution of 100 µHz. However there is a problem that the time measureing block can measure only one cycle time, time resolution will inversely proportionate to input frequency. Because the block is for only time interval measurement, not designed for reciprocal method. This mode is an additional measurering mode with the time internal modes. It would be able to implemented full functional logic if a higher density PLD is used instead. Therefore this mode is suitable for only low input frequency, as for high frequency, direct counting method will do.
The top image of this page shows that measureing 400 Hz test signal and last digit is not steady. It seems that is 6 digits resolution because of repeating the time measureing operation for one second and calcurating frequency from its average.
- Mode 3 (Cycle Time [ms])
This mode measures cycle period of rising edges (falling edges at IN-2 inverting mode). The display format is 0000.0000 ms, it can display up to 10 seconds in resolution of 100 nsec. Since the reference clock is 12.8 MHz, actual time resolution is approx. 78 nsec, the counter value is divided by 1.28 and scaled in to 100 nsec resolution.
- Mode 4 (Pulse Width Time [ms])
This mode measures pulse width of high levels (low levels at IN-2 inverting mode). Any other funcitons are same as mode 3.
Selecting Coupling Mode and Trigger Polarity (([Cupl],[Pol] button)
These buttons change coupling mode and trigger polarity of IN-2.
Hold Display ([Hold] button)
This button stops and restarts measureing operateion. In hold mode, display will blink to indicate that it is in the hold mode. When no result is displayed after mode change or hold release, wait for a new result and then enter hold mode.
Expanding Gate Time ([Hold]+[Mode] button)
This funciotn changes gate time at mode 0 and 1. The gate time is expanded 10 times and frequency resolution is magnified 10 times. However the most decimal points of 7 segment LEDs are used for other status, so that the display format is not changed. Of course output value to the communication port is scaled.
The serial data format is N81, 2400bps. Measured values are sent as a line each at the time of the display is updated. It can be saved as a CSV file. Especially the Microsoft Excel can directly read results into the cells with VBA. When collect any time intervals, it is a simple time interval analyzer.
The universal counter can also be controlled by serial commands form host. The command character is not echo-backed, and each functions are as follows:
Select operation mode. <n> determins requested mode number which can be 0 to 4.
Select IN-2 coupling mode. 0 selects AC coupled, 1 selects TTL coupled.
Select IN-2 trigger polarity 0 selects rising edge (high level), 1 selects falling edge (low level).
Select gate time in mode 0 and 1. 0 selects normal, 1 selects expand to 10 times.
|Main ICs||MCU: AT90S8515 (ATMEL) |
PLD: ispLSI2032 (Lattice)
|Functions||Mode 0: Frequency(IN-1), up to 2.4GHz (in resolution of 100Hz) |
Mode 1: Frequency(IN-2), up to 100MHz (in resolution of 1Hz)
Mode 2: Frequency(IN-2), up to 10kHz (in resolution of 100µHz)
Mode 3: Pulse Period(IN-2), up to 10sec (in resolution of 100nsec)
Mode 4: Pulse Width(IN-2) up to 10sec (in resolution of 100nsec)
|Inputs||IN-1: ZIN = 50ohm, 10MHz-2.4GHz |
IN-2(AC): ZIN = 1Mohm, 10Hz-100MHz
|Reference clock||Frequency: 12.8MHz |
Temperature stability: ±2.5ppm (-30°C-75°C)
Long term stability: ±1.0ppm/Year
Accuracy: Depends on calibrating method
|Commnication||One ground isolated serial port to log data into PC and control with PC.|
|Cost||Approx. 6,000 JPY (parts only)|
- Main Board – Circuit Diagram and Photo. The board layout is like the circuit diagram.
- Display Board – Circuit Diagram and Photo. It is mounted to chassis like this.
- Prescaler Board – Circuit Diagram and Photo. To avoid signal loss, it is mounted to input coupler directly.
- Internal View and Front Panel. It is measureing oscillation frequency of an FM transmitter. This is the rear view. The power switch was ejected to rear panel, larger chassis should be selected.
- Input sensivity – frequency response of IN-2 preamplifire. It is good considering that it is simple circuit. The MB506 used for IN-1 operates 100MHz-2.4GHz, however it can also be used at lower frequency region of 10MHz-.(IN-1 input sensivity)
- Sources – AVR code and PLD code. The PLD code can be fitted to any small CPLDs. If you cannot understand PLD, refer to this.
For more detail: Frequency counter using AVR microcontroller