NORWOOD, Mass. (PRWEB) November 19, 2008
The 250-MSPS (mega-sample-per-second) AD9239 incorporates an efficient packetized output scheme, while the 210-MSPS AD9639 supports a JESD204-compliant output scheme. Both ADCs feature on-chip PLL (phase-locked loop) and input buffer circuits, which are designed for low cost, low power, small size, and ease of use. The new ADCs require a single 1.8-V power supply, dissipating 1.5 W in normal mode and 145 mW per channel (typical) when standby-mode is enabled with the digital link remaining in operation. The new devices are also the first high-speed ADCs to feature an on-chip temperature sensor, which allows engineers to conduct thermal monitoring for optimized system operation. The quad ADCs offer excellent noise performance and achieve SNR (signal-to-noise ratio) of 65 dBFs, SFDR (spurious-free dynamic range) of 77 dBc and an ENOB (effective number of bits) of 10.5, all at an 85-MHz input frequency.
The AD9239 and AD9639 support an LVDS (low-voltage differential signal)-compatible sample-rate clock input and provide four serial digital output streams with coded data from each ADC channel. Clock information is also coded into each serial stream so that the receiving logic can extract the necessary clocking information. The AD9239 and AD9639 are available with ADI’s VisualAnalog evaluation and ADIsimADC behavioral software modeling tools.
Availability and Pricing
Product
