LOW-POWER BUTTON REPLACEMENT WITH FORCE-SENSITIVE RESISTOR

A common requirement for devices that must be sealed from environmental exposure is to replace all metal contact style push-buttons with functional replacements that do not have those weather-sealing difficulties. This article describes one such way of creating a contact button replacement using a Force-Sensitive Resistor (FSR) in conjunction with an SLG47004V.

The design highlighted above is intended for use as a functional replacement for a metal contact style push-button while featuring ultra-low power consumption. Using an external force-sensitive resistor in series with one of the ICā€™s internal rheostat modules, a resistor divider network is created which is subsequently sampled by one of the SLG47004Vā€™s internal low-power ACMPs. This ACMP determines the state of the button based on the voltage present at the divider output. Once the internal low-power ACMP determines that the button has been pressed, internal GreenPAK logic processes the button press signal to determine whether a single, double, or triple-tap has occurred, and outputs these signals to dedicated pins.

Since the force-sensitive resistor present in this design is highly susceptible to variation in resistance due to temperature changes, often as severe as +/-15% at extreme high/low temps, a constant ā€œno-pressā€ reference voltage must be maintained throughout a wide range of temperatures. This constant reference voltage is achieved using the circuitā€™s auto-trim functionality, which periodically samples the divider output voltage and adjusts the SLG47004Vā€™s internal rheostat resistance, allowing the divider output to return to the specified ā€œno-pressā€ reference voltage. This auto-trim functionality not only allows for accurate operation over a wide range of temperatures, but it also allows the design to accommodate for sensor-to-sensor variations as well as variations in the overall system voltage level.

To attain ultra-low current consumption, the ACMP and external resistor divider network are controlled by the integrated circuitā€™s wake/sleep controller. This wake/sleep controller keeps the ACMP in sleep mode via matrix signal, and the resistor divider circuit in an open state via one of the ICā€™s internal analog switches, which is placed on the low side of the divider. The Chopper ACMP, which is responsible for the ICā€™s auto-trim functionality, is also indirectly controlled by the wake/sleep controller using an intermediate counter that triggers an auto-trim cycle once every 100 normal wake/sleep cycles.

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Muhammad Bilal

I am a highly skilled and motivated individual with a Master's degree in Computer Science. I have extensive experience in technical writing and a deep understanding of SEO practices.

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