World’s Fastest 8051 Microcontroller IP Core with JTAG on-chip Debug Interface

Summary of World’s Fastest 8051 Microcontroller IP Core with JTAG on-chip Debug Interface


The DP8051 is an 8-bit, ultra-high-performance soft IP core designed by Digital Core Design and distributed by HiTech Global. It features a pipelined RISC architecture delivering 85–200 million instructions per second, with full binary compatibility to the standard 8051 microcontroller. The core supports both Harvard and Von Neumann configurations and includes a JTAG on-chip debug interface for real-time hardware breakpoints. It comes with a comprehensive suite of peripherals and a fully automated testbench for easy SoC design validation across ASIC and FPGA platforms.

Parts used in the DP8051 Project:

  • JTAG on-chip debug interface
  • Pipelined RISC architecture
  • PMU (Power Management Unit)
  • UART (Universal Asynchronous Receiver-Transmitter)
  • Timers
  • Watchdog
  • Interrupts controller
  • MDU (Multiplication/Division Unit)
  • I2C interface
  • 10/100 MAC (Media Access Control)
  • FPAU (Floating Point Arithmetic Unit)
  • FPMU (Floating Point Management Unit)
  • Automated testbench
  • Xilinx FPGA support
  • Altera FPGA support
  • Lattice FPGA support

San Jose, CA (PRWEB) June 2, 2005

Designed by Digital Core Design, and proven in multiple ASIC and FPGA designs, the DP8051 is an 8-bit ultra high performance, speed optimized controller with JTAG on-chip debug interface supporting unlimited number of real time hardware breakpoints.

The DP8051 soft IP core is 100% binary-compatible with the industry standard 8051 8-bit microcontroller and supports both Harward and Von Neumann configurations. The core is supported with wide range of peripherals including; PMU, UART, Timers, Watchdog, Interrupts, MDU, I2C, 10/100 MAC, FPAU, and FPMU.

The DP8051 has Pipelined RISC architecture 10 times faster compared to standard architecture and executes 85-200 million instructions per second.

The DP8051 is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC design flow.

“High performance, speed, real time on-chip JTAG interface, and extraordinary support provided by Digital Core Design and Hitech Global make the DP8051 IP Core the premium choice by many SOC designers around the world – Said Cyrus Merati HiTech Global Sr. Director of Sales and Marketing.

“Basing on a huge popularity of previous version of our debugger, we implemented JTAG interface to make the newest DoCDTM even better. Nowadays our system can meet all the requirements and needs, which a user can expect from the hardware debugger, and get an excellent complete IP solution (core and debugger) from the only one design company.” – said Jacek Hanke – President of Digital Core Design.

Additional product information is available at http://www.hitechglobal.com/ipcores/dp8051.htm

Pricing and Availability

The DP8051 and its peripherals are available for immediate implementation in ASIC and FPGA (Xilinx, Altera, and Lattice). For pricing information please contact HiTech Global Distribution at [email protected]

About HiTech Global Distribution, LLC.

HiTech Global Distribution LLC (HTGD) is a North American based distributor and design house headquartered in Silicon Valley, California. HTGD’s main line of products includes IP Cores, prototyping boards, modules, and embedded system design tools. HiTech Global Distribution, LLC also provides FPGA, ASIC, SOC, and PCB design services. For additional information about HiTech Global Distribution, LLC, please visit: http://www.HiTechGlobal.com.

About Digital Core Design

DCD provides a broad line of general-purpose IP cores, including 8-, 16- and 32-bit processors, peripherals, serial interfaces, floating point arithmetic units and floating point coprocessors. Formed in 1999 Digital Core Design is a privately held company with headquarters placed in Bytom Poland. Since starting of productivity in 1999 – DCD has established a reputation for highest-quality products, flexible licensing and quick and responsive technical support. Experience of our highly qualified engineers allowed us to produce IP’s with highest market performance and smallest gate count. The number of DCD’s customers is growing every month, which makes DCD one of leading IP providers in the world. For more information, please visit: http://www.dcd.pl.

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Quick Solutions to Questions related to DP8051:

  • What is the performance speed of the DP8051?
    The DP8051 executes between 85 and 200 million instructions per second.
  • Does the DP8051 support different memory architectures?
    Yes, it supports both Harward and Von Neumann configurations.
  • Can the DP8051 be used with Xilinx FPGAs?
    Yes, the DP8051 is available for immediate implementation in Xilinx, Altera, and Lattice FPGAs.
  • How does the DP8051 compare to standard architecture?
    The DP8051 has a Pipelined RISC architecture that is 10 times faster compared to standard architecture.
  • Is the DP8051 compatible with industry standard 8051 microcontrollers?
    Yes, the DP8051 soft IP core is 100% binary-compatible with the industry standard 8051 8-bit microcontroller.
  • What debugging capabilities does the DP8051 offer?
    It features a JTAG on-chip debug interface supporting an unlimited number of real time hardware breakpoints.
  • Does the DP8051 come with testing tools?
    Yes, it is delivered with a fully automated testbench and a complete set of tests for package validation.
  • Which companies are involved in the DP8051 project?
    Digital Core Design created the core, and HiTech Global Distribution acts as the North American distributor.

About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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