Summary of How to drive 595 shift registers with AVR hardware SPI using ATmega168 microcontroller
This article explains how to drive 74HC595 shift registers using an AVR microcontroller's built-in SPI hardware. It details the necessary connections, including linking SCLR to VCC and Enable to GND for simplicity. The design utilizes three control pins: Serial In (SI), Shift Clock (SCK), and Register Clock (RCK). Data cascading is achieved by connecting the QH prime output of the first chip to the SI input of the second, allowing multiple registers to be controlled via a single serial line from an ATmega168.
Parts used in the Drive 595 Shift Registers with AVR Hardware SPI project:
- ATmega168 microcontroller
- 74HC595 shift register chips
- SCLR pin connected to VCC
- Enable pin connected to GND
- Serial In (SI) connection
- Shift Clock (SCK) connection
- Register Clock (RCK) connection
- QH prime pin
Driving a shift register using an AVR chip’s built-in hardware is really quite easy. Most of their offerings have an SPI module, or Serial Peripheral Interface. A shift register is exactly that, a peripheral device that communicates via a serial line. All we need to do is hook up our connections and use a few pieces of simple code. Join me after the break to see how that’s done.
Just want to know how shift registers work? Check in on my other post on that topic.
Schematic
The first thing to consider is that it may not be necessary to connect the Clear and Enable pins to the microcontroller. If there are relatively few shift registers being used together it may be easier to shift in all zeros and latch them to the registers. But if timing is a big issue you may want this capability. For this example I have just connected the SCLR pin to VCC and the enable pin to GND.
This leaves three control pins: SI, SCK, and RCK. It is possible to drive SCK and RCK from the same signal, but that’s for another tutorial. My test hardware, the ATmega168, has pins meant to drive each of these controls. Note that the serial and storage clocks (SCK and RCK) for both shift register chips are hooked together on two data buses. The Serial In of the first chip (SI) is connected to the microcontroller. The QH prime pin of this first chip is connected to the SI pin of the second chip to cascade the data from one to the next.
For more detail: How to drive 595 shift registers with AVR hardware SPI using ATmega168 microcontroller
- How does an AVR chip drive a shift register?
It uses the built-in SPI module or Serial Peripheral Interface to communicate via a serial line. - What are the three main control pins required?
The three control pins are SI, SCK, and RCK. - Can SCK and RCK be driven by the same signal?
Yes, it is possible to drive both clocks from the same signal, though this requires a separate tutorial. - How do you cascade data between two shift register chips?
The QH prime pin of the first chip is connected to the SI pin of the second chip. - When might you connect Clear and Enable pins to the microcontroller?
You may want this capability if timing is a big issue rather than just shifting in zeros. - What happens if few shift registers are used together?
It may be easier to shift in all zeros and latch them to the registers without connecting specific control pins.
