San Jose, CA (PRWEB) September 23, 2004
eASIC® Corporation, a provider of breakthrough Structured ASIC technology and products, today announced that the company was chosen to present at the Emerging Technologies Conference Showcase, organized by Technology Review, MIT’s Magazine of Innovation, on MIT’s campus, on September 29-30, 2004. A total of thirty companies were selected through a juried process led by Technology Review’s staff. eASIC will showcase its Structured ASIC technology, a novel electronic design architecture protected by 10 issued patents. This technology was developed to cope with major semiconductor design issues and allow high-performance and affordable product developments in todays nanotechnology era.
Vinod Khosla, Partner at Kleiner Perkins Caufield & Byers (Menlo Park, California) who is a keynote speaker at the event said: Technology innovation is spinning the wheel of high-tech that drives the economic growth cycle. KPCB is looking for investments like eASIC, whose innovative chip customization technology can create a paradigm shift and enable innovation to flourish. eASIC holds the keys to significantly reduce the escalating cost of Integrated Circuit design, which has become a major obstacle for innovation.
“The Emerging Technologies Conference at MIT showcases the technologies that are poised to make a dramatic impact on our world, said Vincent Caprio, Event Director of Emerging Technologies Conference. We expect over 1,000 senior level innovators, inventors and technology decision makers to attend the conference. This showcase is an ideal way for a growing business to present products and innovations to technology’s best and brightest leaders.”
“The selection of eASIC to present at this prestigious conference was very elating. said Zvi Or-Bach, Founder and CEO of eASIC. eASICs innovative technology is aimed at removing the barrier of entry for new and innovative electronic designs, out of which tomorrows killer applications can emerge. With todays skyrocketing cost of ASIC development, when design cost exceeds $ 10M, many novel ideas can not materialize into products. Thus, the number of ASIC designs has been dropping dramatically in the last few years, and eASIC is dedicated to counteracting this trend.
eASIC® has developed a breakthrough Structured ASIC technology aimed at dramatically reducing the overall fabrication cost and time of customized high-performance semiconductor chips. eASICs technology enables rapid and low-cost ASIC and System-on-Chip designs by its innovative use of proven programmable logic fabric in conjunction with single-via customizable segmented routing. As single-via generates ten times higher throughput of Direct-write e-Beam customization, it enables eASIC to offer NRE-free Structured ASIC. The Structured eASIC technology was successfully proven in silicon and validated by world-class semiconductor vendors. Partnering with industry leaders to jointly develop, manufacture and market Structured ASIC products, the company is positioned to become the preferred Structured ASIC solution.
eASIC Corporation is a privately held company, Venture Capital backed by Kleiner Perkins Caufield and Byers. Headquartered in San-Jose, California, eASIC was founded in 1999 by Zvi Or-Bach, the founder of Chip Express who is viewed by many as the father of Structured ASIC technology. http://www.eASIC.com
Emerging Technologies Conference at MIT web site: http://www.tretc.com