Irvine, Calif., and Athens, Greece (PRWEB) June 4, 2007 ClariPhy Communications and Helic S.A. today announced details of their joint engineering collaboration over the past 12 months, which has been instrumental in the first-pass success of ClariPhy’s single-chip, 10GBASE-LRM, mixed-signal CMOS transceiver. ClariPhy’s transceiver features a low-power 10G Analog to Digital Converter (ADC) and a […]
NORWOOD, Mass. (PRWEB) December 1, 2008 The ADF4602-1 3G transceiver is ideally suited to high-performance 3G femtocells providing cellular FMC (fixed mobile converged) services. With a receive sensitivity of better than 113 dBm, the front end includes three high-performance single-ended LNAs (low-noise amplifiers), allowing the device to support tri-band applications. The receiver is based on
Sunnyvale, Calif. (PRWEB) June 19, 2003 Catalyst Semiconductor (NASDAQ: CATS) today announced it has been awarded a U.S. patent (number 6,518,737) on its innovative, low dropout (LDO) linear voltage regulator design. The new circuit technique enhances Catalysts capability to incorporate its programmable EEPROM technology and mixed-signal design into system level integrated circuits (ICs). “This
CATALYST SEMICONDUCTOR PATENT GROWS MIXED-SIGNAL INTELLECTUAL PROPERTY PORTFOLIO Read More »
Montreal (PRWEB) February 3, 2005 Goal Semiconductor today introduced the UniVersaKit (UVK), a new development kit and evaluation system that supports all Goal VERSA product families as well as most industry-standard 8051 microcontrollers and ships complete with IDE (Integrated Development Environment), C compiler and assembler. The UniVersaKit (UVK) is a complete and comprehensive evaluation
San Jose, CA (PRWEB) March 26, 2012 Triad Semiconductor and Mentor Graphics Corporation today announce a new approach to low cost, mixed-signal IC design, for the masses, with the introduction of ViaDesigner. This unique offering enables new IC development in two to six months, allows respins in less than four weeks, and can radically reduce
